The fortress of an established FPGA company has many walls. One side is defended by the incredible cost of creating a competitive programmable logic architecture in a cutting-edge process geometry. With the leverage of a process node or two between you and your competitors, you can successfully fend off an attack by a less-established company simply by being in production with a line of parts on the current smallest geometry available. However, the basic architectures of programmable logic are now fairly well known and not well defended by current patents, so anybody with good business sense, a little creativity, and enough venture cash to crunch out a few mask sets can be shipping silicon in short order.
Established FPGA companies also defend their turf with well-trained sales and support teams. Building a sales organization is a complicated, slow, and expensive business, but established distributors are willing to pick up a novel line if it shows promise of filling a market niche. If you’re starting your own FPGA company, you can usually get some leverage by taking advantage of existing distribution to market to sell your chips.
One of the hardest moats to cross for an aspiring FPGA competitor is the challenge of fielding a robust set of tools that will enable your customers to do something useful with your devices. While you can buy your way into other areas of the chip-making business, technology-specific design tools like synthesis and place-and-route are another story. Both of these tool technologies are highly dependent on the vagaries of your particular creative architecture, and both take significant time and money to develop to a mature state.
The established FPGA companies are generally pretty quiet about how much they spend on design tool development, but it is rumored to be roughly equal to what they spend on chip design. Certainly both Xilinx and Altera have very large software engineering organizations dedicated to the development and refinement of architecture-specific design software. Competitive tools are essential to the success of their product lines. Ready availability of these tools at a low cost to their customers also forms a significant competitive barrier against smaller competitors.
Other FPGA vendors rely heavily on partnerships with established EDA companies like Synplicity and Mentor Graphics in order to field a set of capable design tools. Unfortunately for a new FPGA startup, it can be hard to make a business case as to why one of these EDA companies should invest significant resources in supporting your novel architecture unless you can lead them to large numbers of customers they wouldn’t otherwise capture. This is almost never the case for a small, new company rolling out a new technology.
This leaves most startups trying to roll out their own design tools during their formative stages. Unfortunately, even with the sharpest software engineers at your disposal, developing a robust synthesis tool takes years of testing, tuning, and bug fixing. Software is like fine wine – there is no effective shortcut to the graceful aging process required to bring it to its potential – until now. SoftJin, an EDA services company, has announced something called a “Programmable Synthesis Engine” (PSE) that could level the playing field somewhat for new FPGA companies that can’t get the attention they need from established EDA suppliers and don’t have the time, money, and expertise to develop complex logic synthesis capabilities to support their architecture.
While synthesis is highly architecture-specific at the back end of the process, some of the most complicated pieces of a synthesis tool, it turns out, are completely generic. You don’t need any information on the target architecture in order to do VHDL and Verilog language parsing and elaboration, for example. In reality, most of the logic synthesis optimizations except for the final mapping can be done in a reasonably generic, architecture-independent fashion.
Softjin recognized this and has developed the major part of a synthesis tool for you. If you’re trying to launch a programmable logic product line, you can start with SoftJin’s PSE and add only the final mapping information (with the help of their consultants), and you’ve covered most of the distance between you and a working synthesis tool. While this will save you tons of initial development time, the true payback will come in shortening of the maturation time normally required to get a synthesis product from “finished” to “actually working.”
SoftJin says that PSE is customizable for a variety of architectures including LUT- and MUX-based programmable logic. SoftJin applies their knowledge of PSE and their consulting experience to get you up and synthesizing as quickly as possible, while your engineering resources are freed up to focus on the similarly pressing problems of getting good silicon back from the fab. “We have a lot of experience working as a consulting company,” explains Kamal Aggarwal, VP of Marketing and Strategy for SoftJin. “PSE lets us apply our consulting knowledge to get a synthesis tool going very quickly on a new target technology with very high quality of results.”
Every year, we hear rumors of multitudes of new ventures launching their nascent navies into FPGA’s turbulent seas. Far less often, we hear of any of them actually escaping from the “quiet mode” that separates initial product development and testing from public announcements and market availability. Their ships are presumably lost at sea somewhere in that dangerous crossing. Perhaps, with an available and safe shortcut for one of the most challenging steps of launching a new platform, more of these efforts will actually see the light of day.
SoftJin’s synthesis toolkit isn’t attractive just for FPGA-related startups, either. There is also a significant number of startup companies developing and marketing higher-level design tools that must connect to established logic synthesis tools at the back end. SoftJin offers them an option of bundling synthesis technology into their ESL offerings with the potential of taking designs from a system-level specification all the way to a gate-level netlist rather than stopping at the register transfer HDL stage and letting regular logic synthesis do the rest.
Over time, if efforts like SoftJin’s Programmable Synthesis Engine are successful, watch for the commoditization of other critical technologies that currently form barriers to new competitors entering the programmable logic domain. For consumers of FPGAs, this would be only good news, as a more competitive market landscape and a focusing of engineering investment on true innovation rather than on re-invention of complex but undifferentiated design tool technologies should result in more capable and lower-priced products.
