Cyrus Tsui doesn’t believe in the “Flanking Attack.” He likes the head-on confrontation, even with an entrenched opponent. He’s not intimidated by numbers or humbled by setbacks. He is a true competitor, and has been in the industry long enough to know that the rules of the game change regularly. This month, Lattice Semiconductor, where Cyrus has been CEO for over 15 years, made its most significant strategic announcement in years, challenging industry leaders head-on in what promises to be one of the most aggressive and lucrative battles of the decade for new market share in programmable logic – the emerging low-cost, high-volume segment.

Lattice has long been respected for its CPLD and PLD offerings, and has made a strong business selling the parts. Cyrus was actually a pioneer in PLDs, working at MMI in the 1970s when the first PAL devices were introduced. “At MMI we were making many different kinds of memories, primarily bipolar PROMs,” says Cyrus. “As we looked at various technologies, we started to investigate AND-OR functions as a way to do math with a PROM. It turned out to be an inherently efficient way to implement logic. We defined an efficient architecture and went looking for customers to prove the concept.”

They found one of their early customers in about 1979 at Data General, on the mini-computer project that was the subject of Tracy Kidder’s Pulitzer-prize-winning book, “The Soul of a New Machine.” MMI marketing took in samples and got the customer excited. The design team then had to deliver the devices for production. “We were aiming for a $5 price, but ultimately we had to charge $50 due to yield problems,” Cyrus recalls. “We also missed our delivery date, and that held up their project. From that experience I learned something that benefited me for the rest of my career. Lattice has never announced a part that it can’t deliver.”

In the next couple of years, the bugs were worked out of the PAL and the emerging video game market turned out to be the key to the explosive growth of these first programmable logic devices. “Little did we imagine that when we were designing those first PALs, we were developing a part that would spawn an industry,” says Cyrus. “It was very exciting from an innovation point of view.”

The lessons of the early PLD days were applied well by Cyrus upon taking the helm at Lattice Semiconductor. Lattice has long been a top competitor in the PLD market and, according to FPGA Journal’s 2003 market study, has the highest customer satisfaction of any vendor on their PLD devices. Lattice has struggled in its attempts to enter the faster-growing FPGA business, though. Now, through a series of acquisitions and agreements, it has amassed a war chest of technology and capability that it is ready to bring to the fight. The new LatticeEC and LatticeECP devices are designed to be highly competitive entrants into the new low-cost FPGA field, and go head-to-head with device families such as Xilinx’s Spartan 3, and Altera’s Cyclone and Cyclone II.

True to Cyrus’s mantra, Lattice announced the new lines just one month before the first customer samples are scheduled to be available. This is far shorter than the industry trend of 6-month advance notice, and jumps Lattice ahead in the reality of delivering next-generation low-cost devices in volume. Cyrus has no illusions that the new market will be a cakewalk, but welcomes the challenge of competing for new, fertile ground. “Moore’s Law continues,” says Cyrus, “but what has happened is that FPGA performance at the 130nm and 90nm level can satisfy the requirements of many, many applications. This means that delivering a better balanced feature set than your competitor will be the challenge.”

Cyrus came to the US to attend USC in the mid-1960s. “As an undergrad I didn’t know what I wanted to study,” he recalls. “I had an interest in history. I experimented in architecture and pre-med, but I didn’t really want to get into those fields. I finally settled in engineering. At the time, it seemed like nuclear engineering would have been the logical choice, but as a non-citizen it wasn’t allowed. I saw EE as an explosive growth area and went after it.”

After USC, Cyrus took his EE degree into the emerging semiconductor market, and settled at Fairchild in 1969. Fairchild at that time was a veritable breeding ground of future semiconductor executives and industry-shapers. “It’s interesting how your decisions affect your path. Many of the decisions I made during that era I feel (in retrospect) I was not equipped to make. Nevertheless you have to make them and press ahead.”

This “don’t look back” attitude has served Cyrus well through his career. After about three years at Fairchild, he went back for a graduate degree at Stanford, and then went to AMD/MMI from 1973 until 1988. His experience there developing the industry’s first programmable logic devices positioned him for his move to Lattice in 1988. For the fifteen years since then, he’s sailed the semiconductor company through the perilous waters of a developing new market space.

Now, having endured the trials of the industry’s toughest times, Cyrus is poised to see Lattice back from the brink with an exciting new lineup of products aimed at new and emerging markets. New products and strategies have been forged based on the lessons of the past, and Lattice is not about to run away from a fight.

“The price sensitivity coming into the market has worked to level the playing field,” says Cyrus. “Up until 2001, FPGAs were driving for density, performance, and features more than cost. From 2001 on, however, customers have become increasingly price-sensitive. Our alliance with Fujitsu has been a key part of our strategy to address that need. We’ve worked with them to produce our new EC lines.” The “EC” stands for economy or, as Cyrus jokes, “El-Cheapo” in the factory. The name is well earned as the die size is compressed to be one of the smallest in the industry for the given functionality. The ECP line is also one of the first low-cost FPGAs to seriously address the DSP-on-FPGA segment with embedded DSP blocks.

Lattice may have some advantage in putting features on its low-cost offerings because it does not have to fear cannibalizing sales of higher-end FPGAs. Even the venerable telecom-based FPGA sockets are now hinging more on price than ever before, and the prospects for very-high-margin FPGAs are rapidly evaporating.

While lean times are not yet history at Lattice, there is tremendous excitement around their new offerings from Cyrus down through the ranks at the company. Lattice will not take the road less traveled in order to secure a stable niche market while larger competitors take the valuable business in new FPGA applications. It’s not Cyrus’s way.