industry news
Subscribe Now

Synopsys Extends Leadership in Storage Standards Verification IP with NVM Express

MOUNTAIN VIEW, Calif., March 22, 2012 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced availability of verification IP (VIP) for Non-Volatile Memory Express (NVMe), an emerging storage protocol for connecting solid state drives (SSDs) directly to the PCI Express® interface. With the addition of the NVM Express protocol to its leading serial ATA (SATA) and serial attached SCSI (SAS) verification IP, Synopsys expands its portfolio and leadership in verification IP for storage protocols.

The first-to-market release of NVMe verification IP was enabled by Synopsys’ recent acquisition of ExpertIO, which brought expertise and a strong portfolio of storage-based verification IP. ExpertIO has been an active member and contributor to the NVM Express architectural committee since its inception.

“Synopsys is focused on delivering high-performance, easy-to-use, high-quality verification IP across a full spectrum of methodologies and simulators,” said Craig Stoops, group director, research and development in the Synopsys Verification Group. “The addition of NVMe further expands our portfolio of verification IP and enables early NVMe adopters to use this emerging protocol to better meet their aggressive time-to-market windows.”

“NVM Express is a key enabler for high-performance PCIe SSDs,” said Amber Huffman, chair of the NVM Express Working Group and principal engineer of the Intel Storage Technologies Group. “The availability of verification IP for NVM Express at this stage of development will enable faster adoption of this exciting new technology. We expect to see NVM Express SSD products shipping later this year.”

NVMe provides a command set, queuing layer and register interface optimized for PCI Express-based SSDs. The NVMe verification IP is a new upper-level protocol layer that can be integrated with Synopsys’ industry-proven ExpertIO PCI Express verification IP.

Availability

The verification IP for NVM Express is available immediately with support for SystemVerilog and UVM on major simulators. See the complete list of Synopsys verification IP at http://www.synopsys.com/VIP. For more information on NVM Express visithttp://www.nvmexpress.org.

About Synopsys®

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Achieving Reliable Wireless IoT
Wireless connectivity is one of the most important aspects of any IoT design. In this episode of Chalk Talk, Amelia Dalton and Brandon Oakes from CEL discuss the best practices for achieving reliable wireless connectivity for IoT. They examine the challenges of IoT wireless connectivity, the factors engineers should keep in mind when choosing a wireless solution, and how you can utilize CEL wireless connectivity technologies in your next design.
Nov 28, 2023
20,250 views