fish fry
Subscribe Now

Silicon Without Software is Just Sand

Shifting Left with Imperas and MIT’s Swarm

No one builds a chip without simulation, right? In this week’s Fish Fry, we take a closer look at the value of virtual prototypes to simulate embedded software. Simon Davidmann (CEO – Imperas) and I chat about about why he thinks no one should design embedded software without simulation, and the benefits of using virtual platforms to develop a verification and test environment. Also this week, we investigate a whole new way to design chips, and it’s called Swarm. We examine the details of this new 64-bit architecture developed by MIT, how it could revolutionize the way multicore chips prioritize tasks, and why Swarm could make writing software a whole lot easier.


 

Download this episode (right click and save)

Links for July 15, 2016

More information about Imperas

ARM Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms

More information about Swarm

Unlocking Ordered Parallelism with the Swarm Architecture (Whitepaper)

Leave a Reply

featured blogs
Apr 19, 2024
In today's rapidly evolving digital landscape, staying at the cutting edge is crucial to success. For MaxLinear, bridging the gap between firmware and hardware development has been pivotal. All of the company's products solve critical communication and high-frequency analysis...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...
Apr 18, 2024
See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services.The post Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud appeared first on Chip Design....

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

Automotive/Industrial PSoC™ High Voltage (HV) Overview
Sponsored by Mouser Electronics and Infineon
In this episode of Chalk Talk, Amelia Dalton and Marcelo Williams Silva from Infineon explore the multitude of benefits of Infineon’s PSoC 4 microcontroller family. They examine how the high precision analog blocks, high voltage subsystem, and integrated communication interfaces of these solutions can make a big difference when it comes to the footprint size, bill of materials and functional safety of your next automotive design.
Sep 12, 2023
27,202 views