feature article
Subscribe Now

Sending Out an SOS

Revival of an Old Technology

When doing your undergrad work in electrical engineering in college, you focus on what’s mainstream. If you’re studying semiconductors, that would mean silicon and CMOS. But you typically get exposed to exotic sideline things as well, just so that you know they’re there. And yes, occasionally they are on the final. Just to see if you were paying attention.

For me, one of those was silicon-on-sapphire (SOS). You’d see reference to it here and there, and it had great promise for… something fast. I didn’t pay much attention (I probably got that problem wrong on the final), and I never had need to pay closer attention once I got into the industry to do real work. At that time, the mainstream was bipolar, with CMOS coming on strong. ECL had some traction and was struggling to remain relevant. SOS figured nowhere in any of the things I was dealing with.

And at some point, I stopped hearing about it. And, eventually, years later, I started hearing about a similar thing, silicon-on-insulator (SOI). I figured that sapphire, while certainly qualifying as an insulator, simply hadn’t made the grade and had been replaced by silicon with an oxide layer.

Now, the fact that I lose track of something doesn’t mean that nothing’s happening. It just means that I might get caught by surprise to find out that something I thought to be dead was, in fact, being revived. What got my attention was news of an antenna-tuning technology from Peregrine Semiconductor and Taoglas. Built on SOS. And as I looked around to see what else was going on, it would seem that Peregrine dominates the current SOS reincarnation. I did find reference to another company, Silanna, that claims to make SOS products as well, but I had to look harder for that (and, had I looked harder yet, I might have found more… And looking at Silanna’s website, it doesn’t appear to have been updated since 2010… but doesn’t say they’re gone… technically). But most leads point to Peregrine.

In this situation, you figure there is one of two things going on. On the one hand, perhaps this company has been trying to keep the SOS dream alive, refusing to accept defeat and keeping the artificial respirator and feeding tube in there in a desperate attempt to prove that this thing can indeed work because if it doesn’t, well, in the words of a nascent officer and gentleman, “We got no place else to go!” On the other hand, maybe they figured something out to change what had been a no-go technology into something viable.

Peregrine would definitely place themselves in the second category. So what is it that they’ve done? The answer to that question also begs the question, “What was the problem before?” It also screams for an answer to the question, “Why are we bothering with this anyway?”

So let’s take these in opposite order, starting with what’s useful about SOS. After all, silicon has covered most bases due to its ubiquity and the resulting cost effectiveness of silicon-based chips. Why do we need something exotic? I suppose the answer would vary in specifics according to the application, but the upshot is that capacitance is much lower, providing better isolation for sensitive high-speed circuits. In particular, wires handling high-speed analog signals; things like RF.

GaAs is often used for such circuits, but as Peregrine tells it, GaAs is fast during the 10-90% part of a transition, but slow for the extreme 10% regions, while SOS is fast 0-100%. GaAs has no complementary technology, creating more of a static power issue (not good for phones!). It also has a high VBE, analogous to the VT of a FET, and this makes it hard to stack transistors when implementing logic, especially with voltages dropping. So a commercially-viable SOS CMOS process could address those deficiencies.

The other big benefit of SOS – one that the military has exploited despite high costs – is that such circuits are rad hard. So they do exist, a few of them, anyway, circling above your head at this very moment.

There are also some interesting things you can do with SOS because sapphire is transparent when polished. For example, if you backlap a metalized wafer to a nice sheen, you can cut metal on the front side by blasting lasers through the backside. Granted, that’s one of those odd characteristics that you might have to think about for a few minutes before coming up with reasons why someone might actually want to do that. Other than that it’s kinda cool.

But here’s the thing with SOS: when you grow silicon epitaxially on the sapphire substrate (typically about a 100-nm layer), well, the interface between the silicon and sapphire can be something of a mess if you’re not careful. The substrate is cut from a single-crystal sapphire ingot, but not along what might be the traditional axis. It’s cut at an angle along what they call the r-plane (I suspect “r” stands for “rhombohedral” based on one reference I saw). In that plane, the lattice matches silicon’s common [100] orientation lattice remarkably well. So lattice mismatch isn’t a big issue (as it is with so many other hybrid materials).

The silicon is deposited at temperatures in the range of 1000-1200 °C. So, of course, you’re going to have a cooling phase afterwards to get things back down to room temperature. And that’s where the damage happens: sapphire’s thermal coefficient of expansion (TCE) is about three times that of silicon. This is not good, creating all kinds of defects and killing yields. Using a thicker silicon layer helps, as “twin” defects cancel each other, but performance demands a thin layer, so you can’t rely on that.

The other traditional challenge comes from aluminum, since sapphire itself is Al2O3. Aluminum deposits may contaminate the interface in the early stages of deposition. Also not good.

These are the main things that have kept SOS out of serious consideration. So what’s changed? First of all, a faster initial deposition rate allows the silicon to stay ahead of the aluminum, keeping the silicon at the boundary cleaner.

But more importantly, Peregrine uses a special implant/anneal step after cool-down. They implant silicon ions (being careful to keep the energy down so as not to shoot them all the way into the sapphire substrate and screw it up). This makes the silicon layer amorphous; they then recrystallize by heating to about 900 °C for an anneal, and it would seem that these vagabond ions compensate for the dislocation stress as they settle into their new homes in the re-formed crystal lattice. They call this process “solid-phase epitaxy” (SPE).

The result is a sapphire-silicon interface of much higher quality, meaning you can make circuits that yield, meaning that costs come way down. This is the essence of what differentiates what they call their UltraCMOS process from prior attempts at commercial SOS. Actually, to be fair, they do say that the use of sapphire for white LEDs has also driven the cost of SOS down by establishing another high-volume market.

And so Peregrine is marketing a variety of circuits that benefit from the characteristics of SOS. And, in fact, they’ve been doing this for a while; one source I saw dated the SPE process to 1990. It’s still not something you hear much about unless you’re specifically in the space they serve, and it’s not like a host of other companies have moved in to share the bounty. Still and all, if they do their jobs right, then those SOS questions on the final just might matter.

 

More info:

Peregrine Semiconductor

Silanna

10 thoughts on “Sending Out an SOS”

  1. Pingback: GVK Biosciences
  2. Pingback: Bdsm
  3. Pingback: ppg reguler
  4. Pingback: vitro pharmacology
  5. Pingback: DMPK
  6. Pingback: free slots

Leave a Reply

featured blogs
Nov 22, 2024
We're providing every session and keynote from Works With 2024 on-demand. It's the only place wireless IoT developers can access hands-on training for free....
Nov 22, 2024
I just saw a video on YouTube'”it's a few very funny minutes from a show by an engineer who transitioned into being a comedian...

featured video

Introducing FPGAi – Innovations Unlocked by AI-enabled FPGAs

Sponsored by Intel

Altera Innovators Day presentation by Ilya Ganusov showing the advantages of FPGAs for implementing AI-based Systems. See additional videos on AI and other Altera Innovators Day in Altera’s YouTube channel playlists.

Learn more about FPGAs for Artificial Intelligence here

featured paper

Quantized Neural Networks for FPGA Inference

Sponsored by Intel

Implementing a low precision network in FPGA hardware for efficient inferencing provides numerous advantages when it comes to meeting demanding specifications. The increased flexibility allows optimization of throughput, overall power consumption, resource usage, device size, TOPs/watt, and deterministic latency. These are important benefits where scaling and efficiency are inherent requirements of the application.

Click to read more

featured chalk talk

STM32 Security for IoT
Today’s modern embedded systems face a range of security risks that can stem from a variety of different sources including insecure communication protocols, hardware vulnerabilities, and physical tampering. In this episode of Chalk Talk, Amelia Dalton and Thierry Crespo from STMicroelectronics explore the biggest security challenges facing embedded designers today, the benefits of the STM32 Trust platform, and why the STM32Trust TEE Secure Manager is an IoT security game changer.
Aug 20, 2024
39,810 views