editor's blog
Subscribe Now

Main Event or Non-Event?

I had a nice talk with one of my favorite chip companies the other day. Two chip companies, in fact. Seems they’d developed some sort of new product and wanted to tell me about it. Okay. Sounds fun. Sign me up.

Except that the chip they described was already four years old.

Confused, I asked, “Uh, so what’s the news here? What are we announcing?”

“It’s our differentiating joint collaboration” was the answer. That set off all kinds of mental alarms. Warning: buzzword alert! Marketing hype incoming!

It seems that what the two companies had actually done was make Company A’s chip work better with Company B’s chip. Neither chip was new, and admittedly many engineers had used them together already. Nevertheless, both companies felt there was room for improvement.

On one hand, I felt like this was a non-event. Neither company had produced a new chip, or even much new software, so there was no “product” in the usual sense.

On the other hand, both sides had expended some real ergs in making the integration of the two chips go more smoothly, and that ought to be worth something. Even if we don’t know what problem(s) they were solving, they seem confident they’ve smoothed the path for us, and that deserves some credit.

What’s your view? Is this just marketing hand-waving or have these guys provided a real service?

Leave a Reply

featured blogs
May 2, 2025
I can safely say that I've never seen a wheeled-legged robot that can handle rugged terrains, muddy wetlands, and debris-strewn ruins like this...

featured paper

How Google and Intel use Calibre DesignEnhancer to reduce IR drop and improve reliability

Sponsored by Siemens Digital Industries Software

Through real-world examples from Intel and Google, we highlight how Calibre’s DesignEnhancer maximizes layout modifications while ensuring DRC compliance.

Click here for more information

featured chalk talk

Shift Left Block/Chip Design with Calibre
In this episode of Chalk Talk, Amelia Dalton and David Abercrombie from Siemens EDA explore the multitude of benefits that shifting left with Calibre can bring to chip and block design. They investigate how Calibre can impact DRC verification, early design error debug, and optimize the configuration and management of multiple jobs for run time improvement.
Jun 18, 2024
74,259 views