editor's blog
Subscribe Now

A New Spin on Logic

Way back in 2008, we took a look at MRAM technology. As a brief review, you may recall that Crocus in particular takes advantage of tunneling magneto-resistance between two magnetic layers. The bottom layer is fixed, or “pinned” and acts as a reference layer. The top one – also referred to as the “free” or “storage” layer – can have its magnetic polarity (or, more accurately, moment) reversed. Selectivity can be improved by engineering the materials so that a current during the write operation will heat the cell and lower the “coercivity” of the material – meaning that you switch that storage layer’s cell without disturbing any other cell. Crocus refers to this as thermally-assisted switching.

With that background (and recommending you to the original article for the details), Crocus has announced what they call a “magnetic logic unit” (MLU). They claim this capability lets them implement a NOR memory architecture, a NAND architecture, or an XOR cell.

They’re still being a bit cautious about the details of how this works, but Crocus’s Barry Hoberman took me though the XOR scenario. Before we can go all the way there, we should take one intermediate step by changing how a cell is read.

Originally, we had a pinned reference layer, and we read the cell by measuring the resistance through the cell. Relatively lower resistance means both layers magnetized alike (or in “alignment”); higher resistance meaning they’re magnetized oppositely (or in “anti-alignment”). So the first step we’re going to take is to remove the pinning. Now the reference layer – also called the “sense” layer, since it helps sense the state of the cell – is magnetically “floating”. Then add some metal lines so that you can magnetize the sense layer as north or south. (To pick arbitrary names for two magnetic states).

To read the cell, first set the sense layer to north and do a resistance read; then, very quickly, switch the sense layer to south and do another read. This is a differential-mode read; whichever resistance is higher establishes the polarity of the storage node.

But here’s where the XOR characteristic comes in: you can ignore the specific northness or southness of the fields. If the two layers – sense and storage – have the same polarity (regardless of what it is), they will run lower resistance; if they have opposite polarity, they’ll have higher resistance. That’s the very definition of the exclusive-OR function (assuming low resistance means 1).

Exactly where all of this will lead product-wise isn’t clear yet. They discuss a number of applications of the NAND and XOR capability, but right now it’s just a technology story. Presumably, staying tuned will give us the rest of the story at some point.

More details in Crocus’s release

Leave a Reply

featured blogs
Apr 25, 2024
Cadence's seven -year partnership with'¯ Team4Tech '¯has given our employees unique opportunities to harness the power of technology and engage in a three -month philanthropic project to improve the livelihood of communities in need. In Fall 2023, this partnership allowed C...
Apr 24, 2024
Learn about maskless electron beam lithography and see how Multibeam's industry-first e-beam semiconductor lithography system leverages Synopsys software.The post Synopsys and Multibeam Accelerate Innovation with First Production-Ready E-Beam Lithography System appeared fir...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Intel AI Update
Sponsored by Mouser Electronics and Intel
In this episode of Chalk Talk, Amelia Dalton and Peter Tea from Intel explore how Intel is making AI implementation easier than ever before. They examine the typical workflows involved in artificial intelligence designs, the benefits that Intel’s scalable Xeon processor brings to AI projects, and how you can take advantage of the Intel AI ecosystem to further innovation in your next design.
Oct 6, 2023
25,587 views