“Disruption is a process, not an event, and innovations can only be disruptive relative to something else.” — Clayton M. Christensen

One good way to gauge reality is to imagine both the extreme worst-case and best-case scenarios, and start to interpolate from there. If we can establish the upper and lower bounds of possibility, we know that reality lies somewhere in between.

I’m sure there’s a formal philosophical definition for the process, but let’s just call it “noodling stuff out.”

Case in point: What if RISC-V – you know, the freely available open-source microprocessor architecture – really is the wave of the future? What if it represents an existential threat to conventional CPU IP companies; a clear and present danger to Arm and… uh, well, just Arm, I guess. Most of the other CPU-design firms are already dead and gone.

Is RISC-V really that disruptive, or is it just the latest overhyped hack du jour, a college prank escaped from campus to wreak havoc on the respectable townsfolk?

To hear the RISC-V evangelists tell it, their new favorite CPU architecture is The Next Big Thing, and nothing less than a total disruption of the CPU landscape. It’s the Uber of CPUs! It’s like Netflix for microprocessors! But talk to other, equally informed, folks and you get a shrug and a “meh.” It’s just another RISC architecture. That and four bucks will get you a latte at Starbucks. What’s the big deal?

So, let’s try a little thought experiment to see if RISC-V really could threaten the IP establishment (for which read: Arm).
Most of all, it’s free, as in both “free beer” and “free speech.” There is no official licensing body for RISC-V, and nobody to tell you what you can and can’t do with it. It costs you nothing to download the RTL and try it out, and the software tools for it are also free. More than once, RISC-V has been called the Linux of microprocessor architectures. And look at how Linux turned out!

Compare this to the multimillion-dollar licensing fees for Arm, MIPS, and other popular microprocessors. Not to mention the royalties. As barriers to entry go, RISC-V stops just short of paying you to use it.

It’s also legally pure. That is, RISC-V’s oversight committee makes sure that any official changes to the core architecture are vetted for patent infringement and prior art. They want to be sure nobody pops out of the woodwork to blindside RISC-V users with an infringement lawsuit down the road. Whatever you add to RISC-V is your own responsibility, but the baseline design is squeaky clean.

Speaking of additions, RISC-V is extensible. You can tweak it to your heart’s content, including adding instructions, accelerators, or other enhancements. As AI startup Esperanto discovered, RISC-V makes a delightful vanilla base for mixing in their special sprinkles. Your RISC-V chip might be completely different from the other guys’ RISC-V chips, but that’s your choice.

But user-extensibility isn’t new. Synopsys has its ARC processor and Cadence has Tensilica, both DIY processors with years of development and happy customers behind them, not to mention the backing of major EDA companies. Even MIPS allows limited tinkering with coprocessors and instruction sets.

On the whole, RISC-V isn’t a big step technically. It’s a decent reduced-instruction-set machine, but it doesn’t break any new ground in CPU architecture. If anything, it’s about 20 years behind the times. There’s a good reason it’s often used as a teaching tool, the same way Pascal was created as a “toy” programming language to teach coding concepts to beginners. They’re both working facsimiles of the real thing, but neither is/was especially avant garde.

If RISC-V is going to disrupt anything, it’s the business model for distributing CPU IP. But even that isn’t new. There are plenty of free and open-source hardware designs available, including CPUs like OpenSPARC, LEON, ZPU, and many others. Creating a workable CPU instruction set isn’t hard, and giving it away is even easier.

Contrast all of this to Arm and MIPS, the two most obvious competitors. Both charge up-front license fees in the six-, seven-, and eight-figure range, plus royalties on every chip produced. That’s a lot of money flowing from chip designers and manufacturers to the IP company. SoftBank just paid over $30 billion for Arm, or about $2 for every Arm-based chip that shipped in 2016. That’s a huge multiple for a company with $1.5 billion in annual gross revenue. The Japanese firm must have seen a lot of upside potential.

A lot of that money goes into designing new CPU cores, new bus interfaces, security features, peripheral hardware, software, development tools, and more. The money that Arm licensees pay comes back to them in the form of new technology. That massive investment in hardware, software, and community creates a virtuous spiral. The more Arm users there are, the more outsiders are attracted to it. Arm has become the de facto standard CPU for most any application. You’d have a hard time convincing your boss why you’re not using Arm-based chips and tools.

The phenomenal growth of Arm as a company and as an architecture suggests there’s real value there. The invisible hand of market forces would have favored another CPU if a more-attractive option had existed. For whatever reason(s), Arm was nearly everybody’s cup of tea.

Designing and licensing IP should be a money-making machine, yet precious few companies succeed at it. Most of the IP firms of the 1990s and Naughties either disappeared or were acquired (cf. ARC and Tensilica). With MIPS having been a part of Imagination Technologies since 2012 and now residing in the grasping hands of private investors, and with Arm now an outpost of the SoftBank empire, it’s safe to say that all the significant IP players have been scooped up.

So, the big question is, will the zero-cost RISC-V option undercut the megabucks Arm franchise? In the big game of corporate Jenga, will it yank out the piece from the bottom that makes the entire multibillion-dollar enterprise collapse in a heap?

Logically, it should. If conventional economic theory is correct, the market will respond by rushing headlong toward the cheaper option, assuming both have equal utility. Arm’s entire business model – indeed, that of the IP-licensing industry as a whole – would break down almost overnight.

Both Arm and RISC-V offer 32-bit RISC processors, so, as a first-order approximation, they’re roughly comparable products. Initial benchmarks indicate that their performance isn’t far apart. RISC-V, like Arm, can be scaled up or down to create either high-end processors or low-cost microcontrollers. And RISC-V offers extra utility in the form of user-defined extensions that Arm doesn’t have. What’s to keep designers from jumping ship tomorrow and redirecting those fat licensing fees toward salary raises, foosball tables, and staff vacations?

History suggests that microprocessor popularity runs in cycles of no more than 20 years. The VAX 11/780, Intel’s x86, and now maybe Arm have all had their heyday. Maybe now it’s time for Arm to start its inevitable decline and for another CPU family to ascend the throne. Maybe.

I think Arm’s popularity is a long way from peaking. It’s still on the way up, in spite of spiraling licensing fees and royalties, and the company’s intransigence regarding user extensions. As one licensee said, “If you ask ARM to add a feature, you get one of two answers. It’s either ‘No,’ or ‘We’ll get to that in about six years.’”

So much of a microprocessor’s popularity is due to its community. You’re joining a club. And Arm has the biggest club. (Microchip’s PIC, Cypress PSoC, Arduino, Raspberry Pi, and many other hardware families have big user communities, too.) So far, RISC-V doesn’t have that kind of backing, so there’s a pioneering feeling associated with it: of blazing a new trail. But most engineers don’t like to be the trailblazers. They’d rather stick with what they know, the tried and true, and innovate elsewhere. User communities, like cults, tend to retain their members for life. And the loyalty rate for CPU families is very high.

Okay, so maybe RISC-V won’t topple Arm’s ziggurat overnight. Could it affect Arm at all? Could RISC-V, by its very existence, apply pricing pressure on Arm? Perhaps. Companies with monopoly positions – and Arm is very nearly a monopoly in the CPU IP space – don’t feel the need to respond to market pressure, especially not by lowering prices. A credible threat from MIPS or SPARC or PowerPC might lead to some back-room haggling during the licensing negotiations, but only for one or two particular CPU cores, and only on a case-by-case basis. (No significant IP firm publishes a price list.) RISC-V doesn’t come close to that level of influence.

What about the reverse case – could Arm attack RISC-V with a new pricing or technology strategy? Maybe the company could introduce a new low-end CPU core and make it available for free. The Arm Medulla Oblongata-X1, let’s say. It would be free to license, free of royalties, and yet compatible with the rest of the Arm product line. Just dust off the old ARM7TDMI schematics and give it a new name!

It’s easy to see – and easy to say – how RISC-V will be the next Linux, but for hardware. Maybe… but recent history doesn’t bear that out. There have been open-source CPUs around for years, and nobody much cared. Open-source software is one thing; open-source hardware is quite another. With software, you’re done. The software is all you need; it is the final product. With hardware, the RTL for the processor is just the starting point on a long and expensive journey. You still need to spend millions designing the chip and fabricating it. (Or maybe try licensing it to someone else!) Saving a few million bucks is great and all, but it’s not the black/white difference between free/expensive that open-source software provides. Think of it more as a modest discount, not a steal.

If you are designing a processor, or some sort of software-programmable device, then RISC-V makes a dandy starting point. Esperanto discovered this only after they’d already designed a whole new CPU of their own, only to scrap it and start over with RISC-V. The RISC-V design gave them working, debugged RTL (and a compiler) to work from. RISC-V itself wasn’t the interesting part. It was just the foundation on which the company erected its real product.

And that’s the rub. Arm maintains iron-fisted control over its architecture and instruction set precisely because the company wants every Arm chip to work like every other Arm chip. Intel and AMD are the same way. Every PlayStation works like every other. Every iPhone runs (almost) every iOS app. There’s value in homogeneity and compatibility.

RISC-V won’t have that – not at the application level. Although firms like Andes and SiFive make generic RISC-V processors, there will be many more Esperantos that make devices that are based on RISC-V, but not really RISC-V. Their compatibility will be hidden, or obfuscated, or just plain irrelevant. Do you know what CPU is in your car’s engine-control computer? Do you care?

That kind of heterogeneity leads to software fragmentation. There’s no market big enough to attract commercial developers. Yes, there will be an assortment of open-source compilers, debuggers, and operating systems. By engineers, for engineers. But no commercial apps; nothing that you’d see shrink-wrapped or offered on Amazon.

RISC-V is an engineer’s toy, and I mean that in a good way. It’s a building block, a LEGO brick, a piece of an Erector set. It’s a component: a thing you use to build other things. It’s a launching pad for elaborate hardware designs that incorporate pipelined instruction execution, but that aren’t computers and aren’t expected to run third-party software. It’s not a host for commercial apps but an engine for proprietary software. And it’s a nice piece of work that represents thousands of hours of labor from thousands of different people. It’s laudable, it’s useful, it’s practical, and it’s free for the taking. It’s just not a disruptive technology or a disruptive business model that will change the CPU landscape. And that’s okay. Welcome to the party, RISC-V.