An environment for functional testing, peeking and poking memory, bus discovery and a powerful scripting because today’s embedded hardware design tools do not address the design test and verification process for prototype hardware, hardware engineers are forced to resort to in-house tools or application OS based testing, resulting in poor test coverage. This paper presents a new hardware test and verification process, based on a Verification and Test OS (VTOS™). VTOS is a user configurable test platform, requiring no porting and can be testing new prototype hardware in 30 minutes. VTOS provides an environment that includes functional tests, peeking and poking memory mapped locations, bus discovery and a powerful scripting language.
February 19, 2013
featured blogs
Apr 24, 2024
Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified through our culture at Cadence. In the DEI@Cadence blog series, you'll find a community where employees share their perspectives and experiences. By providing a glimpse of their personal...
Apr 23, 2024
We explore Aerospace and Government (A&G) chip design and explain how Silicon Lifecycle Management (SLM) ensures semiconductor reliability for A&G applications.The post SLM Solutions for Mission-Critical Aerospace and Government Chip Designs appeared first on Chip ...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...