industry news
Subscribe Now

Cadence Announces Broad Portfolio of 3D Memory Verification IP

SAN JOSE, Calif., October 23, 2014?Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced the immediate availability of verification IP (VIP) supporting all popular 3D memory standards including Wide I/O 2, Hybrid Memory Cube (HMC), High Bandwidth Memory (HBM) and DDR4 3D Stacking (DDR4-3DS). The portfolio of memory VIP enables designers to accelerate the verification of memory interfaces and achieve earlier system-on-chip (SoC) verification closure for compute server applications, mobile devices, high-performance graphics and network applications.

Advanced features of these new VIP models include direct memory access for read, write, save, preload and comparison of memory contents, robust assertions, error configurability, transaction callbacks, assertion reports and a built-in address manager. Additionally, the models support all leading third party simulators, verification languages and methodologies, enabling SoC verification teams with the fastest path to verify the correctness of interfaces to these new, specialized memories.

“Memory is a critical factor in increasing functionality and performance of advanced system topologies,” said Robert Feurle, vice president of compute and networking marketing at Micron. “The fact that Cadence is involved in the development of all the latest standards enables our designers to accelerate their adoption of innovative technologies such as Hybrid Memory Cube.”

“3D memories are increasingly becoming essential to the next generation of electronic products,” said Erik Panu, vice president, Research & Development of the IP Group at Cadence. “The availability of Cadence VIP products supporting the latest standards facilitates a quick and convenient means for our customers to rapidly deploy the new 3D memory standards and to verify the correctness of their usage with SoC designs.”

Information about the new products, along with articles and videos pertaining to 3D memory technologies is available at www.cadence.com/news/3dvip.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

PIC32CX-BZ2 and WBZ451 Multi-Protocol Wireless MCU Family
Sponsored by Mouser Electronics and Microchip
In this episode of Chalk Talk, Amelia Dalton and Shishir Malav from Microchip explore the benefits of the PIC32CX-BZ2 and WBZ45 Multi-protocol Wireless MCU Family and how it can make IoT design easier than ever before. They investigate the components included in this multi-protocol wireless MCU family, the details of the software architecture included in this solution, and how you can utilize these MCUs in your next design.
May 4, 2023
40,786 views