EEJournal

fish fry
Subscribe Now
March 24, 2017

Standards Soup

Hybrid Systems, Board Design and a Bowl Full of Standards
by Amelia Dalton

With a dash of mini PCIe, a couple heaping spoonfuls of VPX and VNX and a whole lot of SBCs, Bill Ripley (Alligator Designs) and I are cooking up the perfect recipe for hybrid rugged computing. In this week’s episode of Fish Fry, Bill and I discuss the role of standards in hybrid systems, the evolving role of COTs in ruggedized systems, and why Alligator Designs can enable board design that other COTS providers cannot or will not do. Also this week, we take a closer look at the trade-off between fixed- and floating-point math in DSP algorithm implementation.


 

Download this episode (right click and save)

Links for March 24, 2017

More information about Alligator Designs

New Episode of Chalk Talk: Fixed Point, Floating Point – What Are the Needs of DSP Applications?

Leave a Reply

featured blogs
Binge on Chip Design Concepts this Weekend!
Apr 16, 2024
In today's semiconductor era, every minute, you always look for the opportunity to enhance your skills and learning growth and want to keep up to date with the technology. This could mean you would also like to get hold of the small concepts behind the complex chip desig...
More from Cadence...
Achronix Achieves 5X Faster Physical Verification for Full SoC Within Budget with Synopsys Cloud
Apr 11, 2024
See how Achronix used our physical verification tools to accelerate the SoC design and verification flow, boosting chip design productivity w/ cloud-based EDA.The post Achronix Achieves 5X Faster Physical Verification for Full SoC Within Budget with Synopsys Cloud appeared ...
More from Synopsys...
Was This the World’s First Micrometer?
Mar 30, 2024
Join me on a brief stream-of-consciousness tour to see what it's like to live inside (what I laughingly call) my mind...
More from Max's Cool Beans...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

Introduction to the i.MX 93 Applications Processor Family
Sponsored by Mouser Electronics and NXP Semiconductors
Robust security, insured product longevity, and low power consumption are critical design considerations of edge computing applications. In this episode of Chalk Talk, Amelia Dalton chats with Srikanth Jagannathan from NXP about the benefits of the i.MX 93 application processor family from NXP can bring to your next edge computing application. They investigate the details of the edgelock secure enclave, the energy flex architecture and arm Cortex-A55 core of this solution, and how they can help you launch your next edge computing design.
Click here for more information about NXP Semiconductors i.MX 93 Power Efficient Applications Processors (Coming Soon)
Oct 23, 2023
23,206 views