All Modules All the Time

Microchip Takes LoRa and Motion Detection by Storm

by Amelia Dalton

One of the biggest challenges in IoT communications is distance. In this week’s Fish Fry, we examine a new communications technology called LoRa. Tyler Smith (Microchip Technology) is here to tell us how it can be used, where it is best suited for implementation, and how LoRa could change the future of IoT communications. Also this week, we look into the details of a new motion detection module that packs a big ol’ punch by combining a powerful motion co-processor with 9-axis sensors (including an accelerometer, a magnetometer, and a gyroscope) all in an itty-bitty package.  Read More


Industry News

March 27, 2015

Bouygues Telecom announces June launch of France’s first “Internet-of-Things” network based on LoRa technology

March 26, 2015

Pentek Introduces Dual Channel Adaptive IF Relay XMC for Commercial and Military Communications

Sidense Increases its Coverage of the Popular 28nm Node

Silicon Labs Pumps Up the Volume for Automotive Infotainment with Scalable Car Radio System Solutions

Microchip’s MOST150 INICs Enable Cost-Effective Smart Antenna Module Coaxial Connectivity to Automotive Control, Audio, Video and Internet Protocol Networks

Industrial Internet Consortium Announces Smart Grid Testbed

March 25, 2015

PrismTech Announces Vortex v1.2, the Latest Version of its Award-Winning Intelligent Data-Sharing Platform for the Internet of Things

GreenPeak Launches Smart PIR Sensor for Smart Home Applications

100V Micropower Voltage Monitors Provide 1.4% Measurement Accuracy for High Voltage Designs

Imec Demonstrates 50GHz Ge Waveguide Electro-Absorption Modulator

Renesas Electronics Europe is the First Semiconductor Supplier to Achieve Full Certification of G3-PLC Modem Solutions for Worldwide Frequency Bands

New Synopsys ASIP Designer Tool Speeds Development of Application-Specific Instruction-Set Processors by 5X

March 24, 2015

60V/4A & 36V/8A Buck-Boost µModule Regulators In 15mm x 15mm BGA Package

Altera and Eutecus Single-chip, FPGA-based Solutions “See” and Provide Intelligent Vision for Smart Cities

Teseq adds 8-channel Arbitrary Waveform Generator to Transient System for All-in-One Automotive Immunity Testing

Tokyo Electron Device Announces the Release of TB-7Z-ISDK, a Development Kit for Industrial Grade SoM That Shortens the Development Time of FA Devices Such As Machine Vision

Silicon Labs and Digi-Key Challenge Developer Innovation With “Your IoT” Design Competition

Dialog Semiconductor Expands Bluetooth® Smart SoC Family with Application-Optimised Versions

STMicroelectronics Announces and Demonstrates its Ultra-HDp60 STB Chips for the Chinese Market

Tektronix Unveils 45 GHz Optical Modulation Analyzer for 400G Communications Testing

March 23, 2015

TI launches the industry’s first online classroom for analog design

Multicore Microcontrollers Enable Gigabit Ethernet Internet of Things for Under $5

ams launches tiny 4mm2 integrated power management solution for wearable devices

New Development Framework from STMicroelectronics Makes Adding IoT Sensing Easy

NeoPhotonics Releases Dual Rate 100G CFP4 LR4 Transceivers

Vector Software Introduces Covered By Analysis Capability in VectorCAST 6.3 Suite

IAR Embedded Workbench supports new Renesas RX71M MCUs targeting the industrial Internet of Things

March 19, 2015

Innodisk Unveils DDR4 Memory for Industrial Applications on Upcoming Skylake Platform

News Archive

TI MCU Goes 32-Bit

New MSP432 Family is ARM-Based… Of Course

by Jim Turley

HLS is the New Black

Cadence Stratus Ushers In a New Era

by Kevin Morris

A Low-Power Gyro – For Real

Harnessing Slosh

by Bryon Moyer

32 Flavors of PCB Software

Altium Brings the Goods to Makers, Startups, and Engineers Alike

by Amelia Dalton

Articles Archive

 

Featured Video

editors' blog

Intel Buying Altera? We Totally Called It.

posted by Kevin Morris

Rumors abound today that Intel is in negotiations to buy Altera - a deal that could be worth over ten billion. If so, it would be the largest acquisition in Intel's history. We have no confirmation from either company that such a deal is in play, but we did a pretty thorough analysis of the situation last June in this article: http://www.eejournal.com/archives/articles/20140624-intel/ What do you think? (Yesterday)

New Membranes, ASICs, and Packages for Akustica

posted by Bryon Moyer

Akustica has revamped their microphone designs, announcing two new devices. (26-Mar)

Synopsys and Leading-Edge Litho

posted by Bryon Moyer

Where is Synopsys focused with its advanced lithography efforts? (24-Mar)

Multicore Microcontrollers for IoT and audio

posted by Dick Selwood

XMOS has launched two new families of the xCORE processor, one for the IoT and the other for audio. (23-Mar)

Microsemi Moves GNSS Indoors

posted by Bryon Moyer

There’s some hassle involved in deploying indoor small cells; Microsemi is trying to simplify the situation. (19-Mar)

Editors' Blog Archive

 

forum

Intel Buying Altera? We Totally Called It.

Posted on 03/28/15 at 7:25 AM by smithtronix

You deservedly should get credit for calling it last year. Of course it should not be a surprise as it really has been an excessively long time in coming. A chronology of technologies leading up to this marriage would be very interesting. Let's just hope …

When Intel Buys Altera

Posted on 03/27/15 at 11:10 PM by kevin

kevin
Well, this article seems to have suddenly taken on more relevance. What do you think?

TI MCU Goes 32-Bit

Posted on 03/25/15 at 9:31 PM by richw42

It's not obvious to me that the free MSPWare includes everything needed, such as a compiler. Why else would it be posed as a component of CCS?

HLS is the New Black

Posted on 03/25/15 at 11:57 AM by TotallyLost

TotallyLost
It's been nearly 20 years down this path, nice to see it realized productively with broad acceptance for large projects

It wasn't even 10 years ago while our team was doing FpgaC, that lead companies like Xilinx were openly rude and hostile to the con…

HLS is the New Black

Posted on 03/25/15 at 4:15 AM by dysonwilkes

Nice overview Kevin.

I often wonder if an HLS flow would be able to produce an implementation that has run-time flexibility. Maybe this is a system-level architecture issue: i.e. you compose sets of blocks implemented by HLS and orchestrate them with …

Programming Dark Matter

Posted on 03/24/15 at 10:56 AM by Jim Turley

Jim Turley
Hmm. Tricky. There are separate TLBs for each CPU core in a multicore chip, even though those same cores share some other MMU resources. That could, theoretically, allow a separate path into the "encrypted" memory through a twin core inside the same chip.

Of Soft Balls and Hard Cracks

Posted on 03/24/15 at 10:30 AM by Jim Turley

Jim Turley
Americanism: one who plays professional baseball (under the auspices of Major League Baseball) and hits ("slugs") the ball a remarkably great distance.

A Low-Power Gyro – For Real

Posted on 03/23/15 at 9:32 AM by bmoyer

bmoyer
Do you think this low-power gyro technology can have legs beyond its original implanatable target?

Programming Dark Matter

Posted on 03/18/15 at 10:48 AM by bmoyer

bmoyer
Jim - Interesting stuff. Question: you mentioned a multi-chip setup providing a possible second path, so it works for a single CPU. But what about multicore within a single chip? There's only a single MMU for all cores there, right? (Not sure if you're eq…

Forum Archive

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Featured Chalk Talk

On Demand Archive

chalk talks

Graphics Rendering and Video Processing with Altera SoC and Helio View Dev Kit

For performance-critical applications like graphics and video rendering, the partitioning between software and hardware can be a pivotal decision. Today, exciting new devices allow us to make and evaluate those tradeoffs more easily than ever. In this episode of Chalk Talk, Amelia Dalton talks to Troy Jones (Macnica Americas) and Todd Koelling (Altera) about creating video and graphics applications using the Helio View development board with Altera SoC FPGAs.

Accelerating Your Analog Output Design

Eventually, most of our designs need to control something in the real world. That means we have to bust out of our safe little digital realm, and drive some analog actuators or something similar. But, building that analog output section from scratch can be a real challenge. In this episode of Chalk Talk, Amelia Dalton talks to Bill Laumeister of Maxim Integrated about the Analog Output Design Accelerator Kit (MAXREFDES24EVSYS), a complete platform for easy evaluation that requires no lab equipment.

Mixed Signal Verification: The Long and Winding Road

Verification of your mixed-signal design can be a nightmare, with clashing disciplines and engineering cultures, and challenging use-case requirements. In this episode of Chalk Talk, Amelia Dalton chats with Steve Carlson of Cadence Design Systems about a comprehensive approach to mixed-signal system verification.

Cadence Perspec System Verifier SW Driven SoC Verification Automation

To verify your next system design, you'll need a lot of use cases. But, creating, tracking, sharing, and running those use cases can be a nightmare. In this episode of Chalk Talk, Amelia Dalton chats with Larry Melling of Cadence Design Systems about the new Cadence Perspec System Verifier and how you can take advantage of its power and flexibility in your system-level design verification.

Vivado IP Flows

Doing IP-based design can be a major productivity booster for your engineering project. But, your ability to easily use and re-use IP can be severely limited if your design tools don't have robust support for creating the IP flow you want. In this episode of Chalk Talk, Amelia Dalton and Tim Vanevenhoven of Xilinx explain how you can create the perfect IP flow for your design process in the Vivado Design Suite from Xilinx.

Efficient Product Creation with Allegro and Sigrity Solutions

Being a PCB Expert isn't enough anymore. With today's interconnected systems, you need to design at the product level to be competitive. In this episode of Chalk Talk, Amelia Dalton chats with Hemant Shah of Cadence Design Systems about product design with Cadence's Allegro and Sigrity tools.

4-Channel Analog Front End Solution

Designing the analog front end for any project can be a time-consuming engineering task. And, without a lot of analog expertise, many of us will face some tricky engineering challenges. In this episode of Chalk Talk, Amelia Dalton chats with Bill Laumeister of Maxim Integrated about a new analog front end (AFE) that both simplifies and improves the design of many analog front ends.

Chalk Talk Archive


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