Optimization Moves Up a Level

Mentor’s RealTime Designer Rises to RTL

by Bryon Moyer

There are a lot of reasons why we can create so much circuitry on a single piece of silicon. Obvious ones include hard work developing processes that make it theoretically doable. But someone still has to do the design. So if I had to pick one word to describe why we can do this, it would be “abstraction.” And that’s all about the tools.

In fact, my first job out of college came courtesy of abstraction. Prior to that, using programmable logic involved figuring out the behavior you wanted, establishing (and re-establishing) Boolean equations that described the desired behavior, optimizing and minimizing those equations manually, and then figuring out which individual fuses needed to be blown in order to implement those equations. From that fuse map, a programmer (the hardware kind) could configure a device, which you could then use to figure out… that it’s not working quite like you wanted, allowing you to throw the one-time-programmable device away and try again.  Read More


Industry News

August 29, 2014

Triple Output 28VIN Step-Down µModule Regulator with Integrated Heatsink delivers 70W in 4.5cm²

VadaTech Announces Rugged MicroTCA.1 Subrack Chassis and Modules

Mentor Graphics Announces its Membership in the European Centre for Power Electronics Consortium

August 28, 2014

Renesas Electronics New R-Car V2H Device Offers High-Resolution Image Recognition for Safer Driver Assistance Systems in Conventional and Emerging Self-Driving Vehicles

Leading European communications companies and research organizations have launched an EU project developing the future 5th Generation cellular mobile networks

Green Hills Software Announces Renesas Electronics’ R-Car Automotive Platform

Allegro Microsystems, LLC Introduces New Galvanically Isolated Current Sensor IC

Texas Instruments expands world’s lowest power microcontroller portfolio to take your metering, health and fitness and wearables designs to the next level

August 27, 2014

KLA-Tencor Introduces Key Systems for 5D™ Patterning Control Solution

24V Triple Output Synchronous Step-Down Controller Features -55°C to 150°C Operating Junction Temperature Range

Renesas Electronics Introduces an IEC 61508 TÜV-Certified RX631, 63N Safety Package to Accelerate Implementation of Safety Systems for Industrial Equipment

TI brings 16-bit ADC precision performance to industrial control applications with new single-core C2000™ Delfino™ F2837xS microcontrollers

Full Compliance with Military Temperature Specification Planned for Altera 20nm FPGA and SoC Devices

August 26, 2014

TI introduces first fully integrated mono, Class-D audio amplifier for eCall, instrument cluster and telematics

Synopsys Announces Results of Robert S. Hilbert Memorial Optical Design Competition

Microchip’s New 2.4 GHz RF High-Power Amplifier Offers Low EVM and Current for 256-QAM and 802.11b/g/n; Extends Range of Ultra-High Data Rate WLANs

Dongbu HiTek Streamlines Touch Control for Smart Phones

August 25, 2014

ProTek Devices’ Newest TVS Array Provides Overvoltage Protection in High Speed Applications

Nallatech Joins the OpenPOWER Foundation

August 22, 2014

Brainboxes introduces Ethernet module with independently configurable analogue inputs for remote monitoring applications

Handheld Touch-Tablet RF Analyzer Suits Wireless Audio Professionals

August 21, 2014

Startup Company, Intugine, Introduces Nimble: Gesture Control Technology To Enhance All Technology Interactions

38V Synchronous Step-Down Controller with 24V Output Capability Draws Only 50µA in Standby

Saelig Introduces 25MHz Digital Oscilloscope-In-A-Probe

Synopsys DesignWare USB 3.0 IP Shipped in More Than 100 Million Production SoCs

August 20, 2014

Undo Software releases UndoDB Out-and-About edition

Algo-Logic Systems Joins OpenPOWER Foundation

100V Synchronous Forward Controller Regulates Output Voltage without an Opto-Coupler

News Archive

The World According to FRAM

TI’s FRAM MCUs and ADI’s X-fest Demos

by Amelia Dalton

Superstar

The Truth About Engineering Talent

by Kevin Morris

Cheap Chips

ASICs for the Rest of Us

by Dick Selwood

Using Accelerometers to Check for a Fever

A Look at One Side of Vibration

by Bryon Moyer

Articles Archive

 

EEJournal On The Scene Video News
 Hosted by Amelia Dalton

editors' blog

Faster Extraction from Cadence

posted by Bryon Moyer

Cadence has upgraded their parasitic extraction tools for the 16-nm node. (28-Aug)

A New 3D

posted by Bryon Moyer

Leti looks at monolithic 3D circuits and NEMS devices through their M3D program. (26-Aug)

Old-School Analog Outputs

posted by Bryon Moyer

Freescale has released a new accelerometer with analog outputs. Um… why? (25-Aug)

A HEMT Cool-Down

posted by Bryon Moyer

A heat-sink-in-the-stack helps manage heat, reduce sizes. (21-Aug)

In-Situ Real-Time Process Checks

posted by Bryon Moyer

CyberOptics sensors masquerade as wafers – and now reticles. (19-Aug)

Editors' Blog Archive

 

forum

Optimization Moves Up a Level

Posted on 09/01/14 at 12:57 PM by bmoyer

bmoyer
What do you think about Mentor's RTL-level optimization?

Cheap Chips

Posted on 08/29/14 at 8:25 AM by carlwh28

It’s an age old question, what to select for your design? ASIC, FPGA, standard parts, ASSP etc. Each will have its merits for a particular design and market requirements, that's why these solutions still exist, there is no one panacea.

What is importan…

Cheap Chips

Posted on 08/28/14 at 3:03 PM by SteveCasselman

While Xilinx has abandoned the lowest end of programmable logic Altera has a low cost, low power, DSP capable device with analog data inputs (AMS). I work at Altera so I currently can't tell you all the great features of this device but it has all the stu…

Cheap Chips

Posted on 08/27/14 at 1:44 PM by dougwithau

Can you still do the "sea of gates" ASIC. The foundry would build an ASIC with lots of gates and leave the top metal layers off for later. The task was putting together the top layer (or 2) of metal interconnect.
It cost $80-100K in NRE 10 years ago. Mu…

Cheap Chips

Posted on 08/27/14 at 11:29 AM by Dick Selwood

Dick Selwood
What do you think about getting an ASIC without the millions of dollars price tag?

Using Accelerometers to Check for a Fever

Posted on 08/25/14 at 10:03 AM by bmoyer

bmoyer
Are you using vibration as a way to detect issues before they become issues?

Middle Child Syndrome

Posted on 08/19/14 at 11:17 AM by kevin

kevin
Do you plan to do any design with 20nm? Do the benefits justify the incremental cost?

Life Under 20

Posted on 08/18/14 at 9:43 AM by bmoyer

bmoyer
We've seen new equipment for the 16/14 node... Are there other challenges at that node we haven't covered?

The Price of Ignorance

Posted on 08/17/14 at 1:19 PM by SteveNordquis4

SteveNordquis4
I'm pretty sure the $1000 power cord is either for supporting alt currency like 3 jingles and $140 for insured party-proof cord, 8% prix fixe vendor/installers, and audio equipment that has to be certified for surgery and/or commercial kitchen use (also s…

Forum Archive

subscribe to our weekly newsletters

twitter.png   rss.png    googleplus.png    linkedin.png    youtube.png    facebook.png



On Demand Archive

 Watch Chalk Talks
 On our New EE Journal YouTube Channel
 Hosted by Amelia Dalton

chalk talks

Static Timing Analysis and Constraint Validation

Before you can even think about timing closure in your FPGA design, you have to set up timing constraints. But, being sure that you have the right constraints can be a real challenge. In this episode of Chalk Talk, Amelia Dalton chats with Ron Plyler of Xilinx about some powerful new ways to set up and validate timing constraints on your way to timing closure with Xilinx's Vivado tool suite.

Verify Design Performance with PADS Best-in-Class Simulation and Analysis

It really isn't important to simulate your PCB design - as long as you don't care about re-spins, signal integrity, cost... OK, actually, there are many good reasons to simulate your board. In this episode of Chalk Talk, Amelia Dalton chats with Jim Martens of Mentor Graphics about simulating your board design using PADS. It may make you re-think your board design strategy.

Vivado In-System Debug

Today's complex FPGA designs can be challenging to debug. If you're debugging in hardware, you need both visibility and control of what's going on inside your chip. In this episode of Chalk Talk, Amelia Dalton talks to Ron Plyler of Xilinx about doing hardware debug in Xilinx's Vivado tool suite.

Scripted Flows in Vivado Design Suite

When you're using a new tool for the first time, a good GUI is great to have, but once you're up and running and automating a complex design process, scripted flows offer a much more powerful means of controlling your tools. In this episode of Chalk Talk, Amelia Dalton and Ron Plyler of Xilinx explore scripted flows in the Vivado design suite.

High Speed Converters: What? Why? (and a little How?)

As we move our analog-to-digital conversion closer to the beginning of our signal chain, the performance demands can get extreme. In this episode of Chalk Talk, Amelia Dalton chats with David Robertson - VP at Analog Devices about how to design high-speed converters for today's most demanding applications.

High-Reliability in FPGA Design - SEU Mitigation

Neutrons are coming for you and you'd better be prepared. Whether we like it or not, SEUs (Single Event Upsets) are becoming a bigger and bigger problem for our designs, especially for high realibility systems. If you thought SEUs couldn't mess up your next design because you aren't designing something destined for space, you need to think again. In this episode of Chalk TalkHD, I chat with Jeff Garrison of Synopsys about the how we can battle SEUs (on the ground or in the air) with the latest generation of design tools.

Maximize Design Productivity With PCIe/104 FPGA/Processor

In this episode of Chalk TalkHD Amelia chats with Christine Van De Graaf of Kontron, who explain how Kontron is incorporating pre-made, small form factor boards, a high-performance embedded processor programmable logic into their new MSMST board and how we can get started designing with one.

Chalk Talk Archive


Login Required

In order to view this resource, you must log in to our site. Please sign in now.

If you don't already have an acount with us, registering is free and quick. Register now.

Sign In    Register